Job Description
Analog/Mixed-Signal (AMS) IC Layout talent in Bangalore, with an emphasis on immediate joiners and candidates on notice period.
Hiring: Senior / Lead Analog & Mixed-Signal IC Layout Engineer
Location: Bengaluru, India 🇮🇳
Experience: 5 – 10 Years
Notice Period: Immediate Joiners / Serving Notice Period Preferred
Are you an AMS IC Layout Engineer with strong hands-on experience in 55nm & 22nm nodes? We are looking for an experienced engineer to own end-to-end IP-level layout delivery from floorplanning through signoff!
Key Responsibilities & Skills Required:
- Experience: 5–10 years in Analog & Mixed-Signal IP development.
- Nodes: Extensive experience in 55nm (Primary) & 22nm (Secondary) nodes.
- Tools: Proficient in Cadence Virtuoso / Virtuoso XL and Mentor Calibre (DRC, LVS, PEX/LPE debug & closure).
- Technical Depth: Deep working knowledge of ESD-aware layout, Deep N-Well isolation, Guard Rings, matching-sensitive layouts, and EM/IR drop closure.
- Collaboration: Strong ability to work directly with circuit designers to drive layout verification and signoff.
Preferred IP Domain Background:
Experience working on precision IPs:
âš¡ LDOs & Power Management IPs
âš¡ ADCs / DACs
âš¡ Bandgap & Voltage References
âš¡ Oscillators, Comparators & Bias Circuits
âš¡ Level Shifters & POR / Voltage Monitors
How to Apply:
If you are actively looking or currently serving your notice period, drop your updated resume at supriya.k@acldigital.com
or send a direct message (DM) on LinkedIn!