Job Description
Job Description – Analog Layout Engineer
Position: Analog Layout Engineer
Experience: 4+ Years
Location: Bangalore / Hyderabad
Availability: Immediate to 15 Days
Technology: Lower-Node / Advanced Process Technologies
Role Overview
We are looking for experienced Analog Layout Engineers with strong hands-on expertise in custom/analog layout development for lower-node and advanced semiconductor technologies. The candidate will be responsible for developing high-quality layouts for analog and mixed-signal blocks while ensuring design robustness, performance, and compliance with physical verification requirements.
Key Responsibilities
- Develop custom analog and mixed-signal layouts for various semiconductor IPs and blocks.
- Work on lower-node technologies and advanced process nodes, preferably FinFET or similar technologies.
- Translate circuit schematics and design requirements into optimized physical layouts.
- Perform complete layout implementation, optimization, and physical verification.
- Handle DRC, LVS, ERC and other physical verification activities and resolve violations.
- Work closely with Analog Design, Circuit Design, Physical Verification and Technology teams to ensure layout quality.
- Analyze and resolve layout-related design issues and improve layout performance.
- Optimize layouts for area, matching, parasitics and performance.
- Perform post-layout verification and debugging.
- Ensure layouts meet foundry design rules and technology requirements.
- Support design reviews, tape-out activities and project milestones.
- Maintain proper documentation and follow established layout methodologies and quality standards.
Required Skills
- 4+ years of relevant experience in Analog / Custom Layout Design.
- Strong hands-on experience with Analog Layout and Physical Design.
- Experience working on lower-node / advanced semiconductor technologies.
- Strong knowledge of DRC, LVS, ERC and physical verification.
- Good understanding of analog layout concepts and matching techniques.
- Experience with Cadence Virtuoso or equivalent custom layout tools.
- Good understanding of CMOS devices, parasitics and layout-dependent effects.
- Experience in handling complex analog blocks and resolving layout issues.
- Ability to work independently as well as collaboratively with cross-functional teams.
Preferred Experience
Experience with layout of any of the following blocks will be an advantage:
- PLL / DLL
- ADC / DAC
- Bandgap / Reference circuits
- LDO / Power Management
- Amplifiers
- Comparators
- SerDes / High-speed interfaces
- Data converters
- Mixed-signal IPs
- Memory-related analog circuits
Candidate Profile
We are looking for candidates who have strong hands-on Analog Layout experience, particularly in advanced/lower-node technologies, with good exposure to physical verification and tape-out environments.
Notice Period: Immediate to 15 Days preferred.
Interested candidates can share their updated CV at: