Job Description
Job Description
CPU RTL Design Engineer
\nLocation: Bengaluru
\nExperience: 5–10 Years
\nRole Overview:
\nWe are looking for a CPU RTL Design Engineer with strong expertise in CPU microarchitecture, computer architecture, and RTL development for next-generation ARM and RISC-V processors. The ideal candidate will contribute to designing, implementing, and optimizing high-performance CPU cores.
\nKey Responsibilities:
\n- \n
- Develop and implement CPU RTL designs based on microarchitectural specifications. \n
- Work on CPU pipelines, instruction execution, branch prediction, load/store units, and memory subsystems. \n
- Translate microarchitecture and computer architecture concepts into synthesizable RTL. \n
- Design and optimize CPU datapaths, control logic, and performance-critical blocks. \n
- Collaborate with architecture, verification, physical design, and performance teams. \n
- Debug RTL issues, perform functional analysis, and support design quality and signoff. \n
Core Technical Requirements:
\n- \n
- 5–10 years of experience in CPU RTL Design / Processor Design. \n
- Strong understanding of CPU Microarchitecture and Computer Architecture. \n
- Hands-on expertise in Verilog / SystemVerilog RTL design. \n
- Experience with ARM processor architecture and/or RISC-V ISA. \n
- Knowledge of CPU pipelines, instruction decoding, execution units, caches, and memory hierarchy. \n
- Understanding of performance, power, and area (PPA) trade-offs in CPU design. \n
- Experience with RTL simulation, debugging, and synthesis-aware coding practices. \n
- Strong problem-solving skills and ability to work on complex CPU design challenges. \n
Preferred Expertise
\n- \n
- Experience with ARM or RISC-V CPU core development. \n
- Knowledge of out-of-order or in-order processor architectures. \n
- Exposure to formal verification, lint, CDC, and RTL quality checks. \n
- Familiarity with CPU performance optimization and microarchitectural trade-offs. \n
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