Design Verification Lead

Job Description

Job Title: Design Verification Lead

Location: Bangalore/Hyderabad

Experience: 7+yrs

Job Type: Full-time

Industry: Semiconductors / VLSI / EDA

Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE or related field

Job Description:

We are looking for a passionate and experienced Design Verification Lead to drive the verification of complex SoC/IP designs. The ideal candidate will have deep expertise in functional verification methodologies and will be responsible for managing a team, defining verification strategies, and ensuring high-quality silicon delivery.

Key Responsibilities:

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• Own and lead verification activities for IP or SoC-level designs.
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• Define and execute the verification plan, test strategy, and coverage goals.
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• Develop and manage verification infrastructure (testbenches, stimulus, checkers, etc.).
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• Collaborate with RTL design, DFT, PD, and firmware teams.
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• Mentor and lead a team of verification engineers.
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• Perform reviews of testbenches, test cases, and coverage reports.
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• Drive simulation-based verification using SystemVerilog, UVM.
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• Track and report project progress and debug issues independently.
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• Participate in regression setup and continuous integration for verification.
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• Deliver high-quality verified RTL to meet tape-out schedules.
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Required Skills:

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• 7+ years of experience in ASIC/FPGA verification.
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• Strong expertise in SystemVerilog and UVM.
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• Hands-on experience in developing complex verification environments.
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• Good understanding of coverage-driven verification (functional and code).
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• Experience with scripting languages (Perl/Python/Tcl).
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• Knowledge of protocols like AXI, AHB, PCIe, USB, DDR, etc.
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• Familiarity with formal verification is a plus.
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• Strong debugging skills using waveform tools like DVE, VCS, or ModelSim.
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• Prior experience in leading teams and driving project deliverables.
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Good to Have:

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• Experience in Emulation/FPGA prototyping.
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• Exposure to low-power verification (UPF).
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• Knowledge of verification IPs and reuse methodologies.
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• Hands-on with gate-level simulations and performance verification.
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Soft Skills:

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• Excellent communication and interpersonal skills.
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• Ability to lead and mentor junior engineers.
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• Strong problem-solving and analytical thinking.
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• Ability to work in cross-functional and global teams.
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Interested can share CV to sharmila.b@acldigital.com