Job Opportunity Posted 2 days ago Updated 28 Sep 2026

PD CAD Engineer

Job Description

Job Description

Greetings from ACL Digital

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We are looking for STA CAD Engineers.

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Experience Level:5+ years of STA CAD

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Job Description: STA CAD Engineer

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Location: Hyderabad and Bangalore

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Role Summary

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We are looking for a Physical Design CAD Engineer with 5+ years of experience in developing, supporting, and optimizing CAD automation and implementation flows for advanced-node SoC physical design. The role requires strong technical depth in EDA tools, scripting, and PD methodologies.

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Key Responsibilities

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  • Develop, enhance, and maintain physical design automation flows for floorplanning, placement, CTS, routing, ECO, and signoff.
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  • Build and support PnR CAD infrastructure, ensuring smooth execution of end-to-end implementation flows.
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  • Create robust automation scripts using TCL/Python/Perl/Shell to improve productivity, runtime, and quality.
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  • Debug tool/run failures and provide CAD-level support to physical design teams.
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  • Collaborate with PD, STA, PV, and RTL teams to define and deploy best-in-class implementation methodologies.
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  • Develop and maintain timing, DRC, and LVS signoff flows, ensuring consistency across corners and technology nodes.
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  • Manage and maintain EDA tool setups, installation, runsets, PDK updates, and license configurations.
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  • Work with EDA vendors for issue resolution, new feature evaluations, and methodology improvements.
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  • Support and automate UPF-based low-power flows including power intent checks.
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  • Maintain flow documentation, regression suites, and continuous integration systems.
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Required Skills

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  • 5+ years of experience in PD CAD / Design Automation roles in SoC or ASIC development.
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  • Strong proficiency in scripting: TCL, Python, Shell (Perl is a plus).
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  • Deep understanding of physical design flows (RTL→GDS), including timing closure and power optimization.
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  • Hands-on experience with major EDA tools such as:
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  • Synopsys ICC2 / Fusion Compiler
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  • Cadence Innovus / Voltus
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  • Calibre DRC/LVS
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  • PrimeTime / Tempus
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  • Knowledge of UPF, multi-voltage/multi-domain design flows.
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  • Experience working on 7nm / 5nm / 3nm nodes preferred.
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  • Familiarity with version control systems (Git/Perforce).
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Preferred Skills

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  • Experience with OpenAccess databases.
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  • Exposure to EDA tool APIs, SKILL, or custom GUI development.
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  • Experience with compute farm management, job schedulers, or cloud-based flows.
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  • Understanding of AI/ML-based flow optimization is a plus.
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Soft Skills

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  • Strong debugging and analytical thinking.
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  • Good communication and collaboration abilities.
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  • Ability to support PD teams proactively and independently.
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Regards,

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Sharmila Begum

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Mail ID: sharmila.b@acldigital.com

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